Silicon Institute of Technology

Results: 113



#Item
51RADIAL PN JUNCTION NANOROD SOLAR CELLS: DEVICE PHYSICS PRINCIPLES AND ROUTES TO FABRICATION IN SILICON Brendan M. Kayes, Christine E. Richardson, Nathan S. Lewis, Harry A. Atwater California Institute of Technology, Pasa

RADIAL PN JUNCTION NANOROD SOLAR CELLS: DEVICE PHYSICS PRINCIPLES AND ROUTES TO FABRICATION IN SILICON Brendan M. Kayes, Christine E. Richardson, Nathan S. Lewis, Harry A. Atwater California Institute of Technology, Pasa

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Source URL: daedalus.caltech.edu

Language: English - Date: 2006-10-31 04:02:22
52APPLIED PHYSICS LETTERS 88, 131109 共2006兲  Spectral tuning of plasmon-enhanced silicon quantum dot luminescence Julie S. Biteen,a兲 Nathan S. Lewis, and Harry A. Atwater California Institute of Technology, 1200 East

APPLIED PHYSICS LETTERS 88, 131109 共2006兲 Spectral tuning of plasmon-enhanced silicon quantum dot luminescence Julie S. Biteen,a兲 Nathan S. Lewis, and Harry A. Atwater California Institute of Technology, 1200 East

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Source URL: daedalus.caltech.edu

Language: English - Date: 2006-11-15 23:23:27
53The failure rates due due cosmic rays of biased high power semiconductors devices should be smaller than one failure per 109 hours and per cm2 silicon area (=1 FIT/cm2)

The failure rates due due cosmic rays of biased high power semiconductors devices should be smaller than one failure per 109 hours and per cm2 silicon area (=1 FIT/cm2)

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Source URL: www.ifjungo.ch

Language: English - Date: 2014-03-27 09:52:37
54Size classification of silicon nanocrystals Renato P. Camata,a) Harry A. Atwater, and Kerry J. Vahala Thomas J. Watson Laboratory of Applied Physics, California Institute of Technology, Pasadena, California[removed]Richar

Size classification of silicon nanocrystals Renato P. Camata,a) Harry A. Atwater, and Kerry J. Vahala Thomas J. Watson Laboratory of Applied Physics, California Institute of Technology, Pasadena, California[removed]Richar

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Source URL: daedalus.caltech.edu

Language: English - Date: 2007-07-14 20:03:28
55Characteristic Impedance of Microstrip on Silicon Dylan F. Williams, Senior Member, IEEE, and Bradley K. Alpert, Member, IEEE National Institute of Standards and Technology, 325 Broadway, Boulder, CO[removed]Ph: [+[removed])

Characteristic Impedance of Microstrip on Silicon Dylan F. Williams, Senior Member, IEEE, and Bradley K. Alpert, Member, IEEE National Institute of Standards and Technology, 325 Broadway, Boulder, CO[removed]Ph: [+[removed])

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Source URL: www.eeel.nist.gov

Language: English - Date: 1999-08-10 15:40:12
56NASA Aeronautics Research Institute  Concept Demonstration of Dopant Selective Reactive Etching (DSRIE) in Silicon Carbide Robert S. Okojie, PhD

NASA Aeronautics Research Institute Concept Demonstration of Dopant Selective Reactive Etching (DSRIE) in Silicon Carbide Robert S. Okojie, PhD

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Source URL: nari.arc.nasa.gov

Language: English - Date: 2014-10-17 18:19:56
57The Coleman Institute for Cognitive Disabilities, in partnership with the Silicon Flatirons Center for Law, Technology and Entrepreneurship, present a public workshop on:    Implications of Cloud Computing

The Coleman Institute for Cognitive Disabilities, in partnership with the Silicon Flatirons Center for Law, Technology and Entrepreneurship, present a public workshop on:   Implications of Cloud Computing

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Source URL: www.colemaninstitute.org

Language: English - Date: 2012-04-05 13:04:01
58[removed]Federal Register / Vol. 76, No[removed]Wednesday, November 16, [removed]Notices Policy Regarding Timing of Issuance of Critical Circumstances Determinations,

[removed]Federal Register / Vol. 76, No[removed]Wednesday, November 16, [removed]Notices Policy Regarding Timing of Issuance of Critical Circumstances Determinations,

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Source URL: www.nist.gov

Language: English - Date: 2011-11-22 10:43:49
59SMEs in Standardization: DS2 Case Study  DS2 DS2 History DS2 (Diseño de Sistemas en Silicio S.A), founded in 1998, developed chipsets for power line networking. The company grew rapidly, especially since 2004 when DS2 l

SMEs in Standardization: DS2 Case Study DS2 DS2 History DS2 (Diseño de Sistemas en Silicio S.A), founded in 1998, developed chipsets for power line networking. The company grew rapidly, especially since 2004 when DS2 l

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Source URL: www.etsi.org

Language: English - Date: 2014-06-16 11:03:34
60GEORGIA TEC H L A BO R AT O RY F O R N E W E L E CT RO N I C M AT E RI A L S  Epitaxial Graphene — Carbon-Based Electronics for the 21st Century  Georgia Institute of Technology

GEORGIA TEC H L A BO R AT O RY F O R N E W E L E CT RO N I C M AT E RI A L S Epitaxial Graphene — Carbon-Based Electronics for the 21st Century Georgia Institute of Technology

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Source URL: mrsec.org

Language: English - Date: 2012-02-29 12:14:51